Non-Volatile Memory (NVM) devices are subject to various failures, e.g., due to imperfect manufacturing process. Such failures include, for example, word-line to substrate and word-line to word-line short-circuit or leakage, which may result in data loss in programming, reading or both.
Methods for post programming verification in NVM devices are known in the art. For example, U.S. Pat. No. 9,330,783, whose disclosure is incorporated herein by reference, describes an apparatus that includes a memory and a memory controller. The memory includes a memory block that includes memory cells connected by word lines. The memory controller is configured to store data in the memory cells, and to identify a suspected short-circuit event in the memory block by recognizing a deviation of a performance characteristic of at least a given word line in the memory block relative to the performance characteristic of remaining word lines in the memory block.